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  general description the MAX20070 is a highly integrated power supply and led backlight driver for automotive tft-lcd applications. the device integrates one buck-boost converter, one boost converter, two gate-driver supplies, and a boost/ sepic converter that can power one to two strings of leds in the display backlight. the source-driver power supplies consist of a boost converter and an inverting buck-boost converter that can generate voltages up to +15v and -15v. both source- driver power supplies can deliver up to 100ma. the positive source-driver supply regulation voltage (v pos ) is set by connecting an external resistor-divider on fbp. connecting the fbp pin to ground sets the regulation voltage (v pos ) to +6.5v. the negative source-driver supply voltage (v neg ) is always tightly regulated to -v pos within + 50mv. the source-driver supplies use an input voltage from 2.7v to 5.5v to generate the output voltages. the gate-driver power supplies consist of regulated charge pumps that generate up to +22v and -22v and can deliver up to 3ma each. the regulation voltage (v gvdd ) on the positive charge pump is set by a resistor-divider on fbpg; the regulation voltage (v gvee ) on the negative charge pump is set by a resistor-divider on fbng. the ic features a dual-string led driver that operates off a separate input voltage (v batt ) and can power up to two strings of leds with 160ma (max) of current per string. the startup and shutdown sequences for all power domains is controlled using one of the seven preset modes that are selectable through a resistor on seq. the device is available in a 32-pin, 5mm x 5mm tqfn package with an exposed pad, and operates over the -40c to +105c ambient temperature range. benefts and features integrates both tft power supplies and led backlight driver in one ic, reducing component count alleviates emi due to spread spectrum on both source driver supplies and led driver 5000:1 dimming ratio at 200hz dimming frequency available in a 32-pin (5mm x 5mm) tqfn with an exposed pad for heat dissipation and operates over the -40c to +105c ambient temperature range ordering information and simplified operating circuit appear at end of data sheet. 19-7118; rev 0; 9/14 applications automotive dashboards automotive central information displays automotive head-up displays automotive navigation systems simplifed operating circuit d1 l1 battery input fault output enable input batt ep en gnd seq dn dp pgvdd in dgvee dgvdd fbpg fbng ref c1 c2 c21 r15 c13 r11 c22 dim input d13 c23 c12 c5 c6 l2 d2 v pos v neg tft power input c7 c9 v gvdd v gvee c10 c19 c14 c11 c20 d3-2 d5 d11 d6 MAX20070 d12 l3 r16 c3 d3-1 flt lgnd lgnd agnd lgnd agnd agnd agnd agnd r12 lgnd v cc drain pgnd comp cs ovp iset dim out1 out2 lx fbp inn hvinp pos neg lxn lgnd tft power input r17 tft power input r5 r4 r6 r7 r8 lgnd agnd MAX20070 integrated tft power supply and led backlight driver
batt to gnd ...................................................... .. -0.3v to +52v out_, drain, ovp to gnd ................................. -0.3v to +52v in, inn, v cc , flt , dim, cs, en to gnd ............... -0.3v to +6v comp, iset to gnd ................................ -0.3v to (v cc + 0.3v) drain and cs continuous current ..................................... 2.4a fbpg, fbng, ref, fbp, seq to gnd ..... -0.3v to (v in + 0.3v) lxp, hvinp to gnd .............................................. -0.3v to +22v pgvdd, pos to gnd ........................... -0.3v to v hvinp + 0.3v neg to gnd .......................................................... -24v to +0.3v lxn to inn ............................................................ -24v to +0.3v dp, dn to pgnd ................................. -0.3v to (v hvinp + 0.3v) dgvdd to gnd .................................................... -0.3v to +24v dgvee to gnd ..................................................... -24v to +0.3v gnd to pgnd ...................................................... -0.3v to +0.3v gnd to lgnd ...................................................... -0.3v to +0.3v continuous power dissipation (t a = +70c) tqfn (derate 34.5mw/c above +70c), multilayer board ......................................................... 2759mw operating temperature range ......................... -40c to +105c junction temperature ...................................................... +150c storage temperature range ............................ -65c to +150c lead temperature (soldering, 10s) ................................. +300c soldering temperature (reflow) ......................................... 260c tqfn junction-to-ambient thermal resistance ( ja ) .......... 29c/w junction-to-case thermal resistance ( jc ) .............. 1.7c/w (note 1) electrical characteristics (v in = 3.6v, v batt = 12v, typical operating circuit as figure 5 , = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter symbol conditions min typ max units input supply in voltage range 2.7 5.5 v in uvlo threshold rising 2.45 2.55 2.65 v in uvlo hysteresis 100 mv in quiescent current v en = v gnd , v in = 3.6v 4 10 a in quiescent current v en = v in = 3.6v, no switching 2.2 ma reference reference output voltage no load 1.234 1.25 1.266 v reference uvlo threshold ref rising 1 1.2 v reference uvlo hysteresis 100 mv reference load regulation 0 < i ref < 100a 10 20 mv reference line regulation 2.7v < v in < 5.5v 2 5 mv boost regulator output voltage range v hvinp v in 15 v v pos 5 15 pos output regulation v fbp = v gnd , v in = 2.7v to 5.5v, 1ma < i pos < 100ma 6.37 6.5 6.63 v operating frequency dither disabled (test mode only), otp options for 400khz and 2.1mhz 850 1000 1150 khz maxim integrated 2 note 1: package thermal resistances were obtained using the method described in jedec specifcation jesd51-7, using a four-layer board. for detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial. absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to ab solute maximum rating conditions for extended periods may affect device reliability. package thermal characteristics MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
electrical characteristics (continued) (v in = 3.6v, v batt = 12v, typical operating circuit as figure 5 , = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter symbol conditions min typ max units frequency dither +0/-12 % oscillator maximum duty cycle 90 94 98 % fbp regulation voltage 1.236 1.25 1.264 v fbp load regulation 1ma < i pos < 100ma -1 % fbp line regulation v in = 2.7v to 5.5v -0.4 0 +0.4 % maximum load current v in = 2.7v, v pos = 15v 50 ma v in = 3v, v pos = 15v 70 fbp input bias current v fbp = 1.25v, t a = +25c 50 120 200 na fbp internal-divider enable threshold fbp rising, hysteresis = 10mv 25 50 mv lxp on-resistance i lxp = 0.1a 0.5 1.0 ? lxp leakage current en = gnd, v lxp = 15v 20 a lxp current limit duty cycle = 80% 1.0 1.2 1.4 a soft-start period i lim ramp 5 ms inverting regulator inn voltage range 2.7 5.5 v inn quiescent current en = gnd, v inn = 3.6v 1 a inn quiescent current v en = v inn = 3.6v 1 ma operating frequency dither disabled (test mode only) 850 1000 1150 khz frequency dither +0/-12 % oscillator maximum duty cycle 90 94 98 % v pos + v neg regulation voltage v inn = 2.7v to 5.5v, v pos = 6.5v, 1ma < i neg < 100ma, i pos = no load, t a = 0c to +105c -50 +50 mv v inn = 2.7v to 5.5v, v pos = 6.5v, 1ma < i neg < 100ma, i pos = no load, t a = -40c to +105c -60 +60 v inn = 2.7v to 5.5v, v pos > 6.5v, 1ma < i neg < 100ma, i pos = no load, t a = 0c to +105c -80 +80 v inn = 2.7v to 5.5v, v pos > 6.5v, 1ma < i neg < 100ma, i pos = no load, t a = -40c to +105c -100 +100 maximum load current v in = 2.7v, v neg = -15v 50 ma v in = 3v, v neg = -15v 70 maxim integrated 3 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
electrical characteristics (continued) (v in = 3.6v, v batt = 12v, typical operating circuit as figure 5 , = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter symbol conditions min typ max units lxn on-resistance inn to lxn, v lxn = 0.1a 0.6 1.2 ? lxn leakage current v in = 3.6v, v lxn = v neg = -15v, t a = +25c 20 a lxn current limit duty cycle = 80% 1.2 1.5 1.8 a soft-start period i lim ramp 5 ms positive charge- pump regulator pgvdd operating voltage range v pgvdd 6 v hvinp v hvinp-dp current limit 15 ma oscillator frequency 300 400 500 khz fbpg regulation voltage 1.236 1.25 1.264 v fbpg line regulation v hvinp = 11 to 15v 0 0.2 %/v fbpg input bias current v fbpg = 1.25v, t a = +25c -100 +100 na dp on-resistance high i dp = 10ma 30 60 ? dp on-resistance low i dp = -10ma 15 30 ? negative charge - pump regulator hvinp-dn current limit 15 ma oscillator frequency 300 400 500 khz fbng regulation voltage -12 0 +12 mv fbng line regulation v hvinp = 11v to 15v 0 0.2 %/v fbng input bias current v fbng = 0v, t a = +25c -100 +100 na dn on-resistance high i dn = 10ma 30 60 ? dn on-resistance low i dn = -10ma 15 30 ? sequence switches pos output range v pos tracks hvinp v in 15 v pos on-resistance (hvinp-pos), i pos = 100ma 0.8 1.5 ? pos charge current limit expires after soft-start period 120 ma pos discharge resistance 2 3.4 6 k? pos soft-start charge time current mode (0a to full current limit) 5 ms neg output range v neg -15 v neg discharge resistance 2 3.4 6 k? pgvdd on-resistance (hvinp-pgvdd), i pgvdd = 3ma 30 60 ? pgvdd current limit expires when pgvdd charging is completed 15 50 ma dgvdd input voltage range 6 22 v maxim integrated 4 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
electrical characteristics (continued) (v in = 3.6v, v batt = 12v, typical operating circuit as figure 5 , = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter symbol conditions min typ max units dgvdd discharge resistance 7 12 17 k? dgvee input voltage range -22 -6 v dgvee discharge resistance 7 12 17 k? seq bias current v seq = 1v 4.5 5 5.5 a tft fault protection hvinp undervoltage-fault threshold v hvinp falling 75 80 85 % neg undervoltage-fault threshold v neg rising (% of pos setting) 75 80 85 % fbp undervoltage-fault threshold v fbp falling 0.95 1.00 1.05 v fbpg undervoltage-fault threshold v fbpg falling 0.95 1.00 1.05 v fbng undervoltage-fault threshold v fbng rising 200 250 300 mv undervoltage-fault timer 50 ms fbp short-circuit fault threshold v fbp falling 30 40 50 % neg short-circuit fault threshold v neg rising 30 40 50 % short-circuit fault timer 10 s batt input input voltage range v batt 4.75 40 v input voltage range v batt v batt = v cc 4.5 5.5 v quiescent supply current i q v dim = 5v, v ovp = 1.3v; out1, out2 open 2.6 5.2 ma standby supply current i sh en = gnd 15 30 a undervoltage lockout uvlo batt v batt rising 4.0 4.2 4.4 v undervoltage-lockout hysteresis 170 mv v cc regulator output voltage 5.75v < v batt < 40v; i load = 0 to 30ma; c vcc = 2.2f 4.75 5 5.25 v dropout voltage v batt = 4.75v, i vcc = 30ma 0.25 0.5 v v cc undervoltage lockout uvlo vcc v cc rising 3.8 4 4.2 v v cc uvlo hysteresis 150 mv short-circuit current limit v cc shorted to gnd 80 ma boost/sepic controller switching frequency dither disabled (test mode only) 900 1000 1100 khz maximum duty cycle d max 88 92 96 % frequency dither +0/-12 % maxim integrated 5 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
electrical characteristics (continued) (v in = 3.6v, v batt = 12v, typical operating circuit as figure 5 , = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) parameter symbol conditions min typ max units slope compensation slope-compensation peak voltage per cycle voltage ramp added to cs 0.23 v cs limit comparator cs threshold voltage v cs_max 250 270 290 mv cs input current 0 < v cs < 0.35 (drain switch on) -1.3 +0.5 a error amplifier out_ regulation voltage v dim = 5v 0.75 v transconductance g m 340 600 880 s comp sink current v out_ = 2.25v, v comp = 2v 160 400 900 a comp source current v out_ = 0v, v comp = 1v 160 400 900 a power mosfet power switch on-resistance 0.15 0.35 ? switch leakage current v batt = v drain = 40v, v dim = 0v 10 a led current sink iset resistance range 9.37 75 k? full-scale out_ output current r iset = 9.37k? 153 160 167 ma r iset = 15k? 95 100 105 ma r iset = 30k? 47.5 50 52.5 ma r iset = 75k? 20 ma iset output voltage 1.225 1.25 1.275 v current regulation between strings i out_ = 160ma -1.5 +1.5 % i out_ = 100ma -2 +2 % i out_ = 50ma -2.5 +2.5 % out_ leakage current v batt = 12v , v out1 = v out2 = 40v, v dim = 0v, t a = +25c 2.5 a dim to led turn-on delay dim rising edge to 10% rise i out_ 150 ns dim to led turn-off delay dim falling edge to 10% fall i out_ 50 ns i out_ rise time 10% to 90% i out_ 200 ns i out_ fall time 90% to 10% i out_ 50 ns logic inputs and outputs dim input high level 2.1 v dim input low level 0.8 v maxim integrated 6 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
electrical characteristics (continued) (v in = 3.6v, v batt = 12v, typical operating circuit as figure 5 , = -40c to +105c, unless otherwise noted. typical values are at t a = +25c.) (note 2) note 2: 100% tested at t a = +25c. all limits over temperature are guaranteed by design, not production tested. parameter symbol conditions min typ max units dim hysteresis 350 mv dim on-time to enter lodim mode 25 s dim low delay to enter lodim mode dim = 0 40 ms dim pullup current 5 a en input logic high 2.1 v en input logic low 0.8 v en hysteresis 125 mv en input current -1 +1 a en blanking time v in = 3.6v 7 s flt output low voltage i sink = 5ma 0.4 v flt output leakage current v flt = 5.5v -1 +1 a flt frequency for fault detection 0.88 1 1.12 khz flt pin duty cycle on led string fault 25 % flt pin duty cycle on tft rail fault fault on at least one of pos, neg, v gvdd , or v gvee 50 % flt pin duty cycle on led string and tft rail fault fault on at least one of pos, neg, v gvdd , or v gvee , and led driver 75 % flt switching frequency on thermal-shutdown event flt is forced low 0 hz overvoltage protection (ovp) overvoltage trip threshold v ovp rising 1.20 1.25 1.30 v overvoltage hysteresis 70 mv ovp input bias current 0 < v ovp < 1.3v -500 +500 na thermal shutdown thermal-shutdown threshold 160 c thermal-shutdown hysteresis 15 c led fault detection led-shorted fault-indicator threshold other string in regulation 3.1 5.5 v led string shorted-shutoff threshold other string in regulation 6 9.5 v shorted led-detection delay 6 s maxim integrated 7 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
(t a = +25c.) 6.40 6.42 6.44 6.46 6.48 6.50 6.52 6.54 6.56 6.58 6.60 2.7 3.4 4.1 4.8 5.5 v pos (v) v in (v) pos line regulation i pos = 100ma toc04 5 7 9 11 13 15 17 19 21 23 25 2.7 3.7 4.7 i in ( a) v in (v) total in supply standby current vs. in supply voltage v en = 0v toc01 -0.020 -0.015 -0.010 -0.005 0.000 0.005 0.010 0.015 0.020 2.7 3.2 3.7 4.2 4.7 5.2 v pos + v neg (v) v in (v) v pos + v neg line regulation diff load = 100ma toc07 diff load = 0a i gvdd = i gvee = 0a 5 10 15 20 25 30 5 10 15 20 25 30 35 40 i batt ( a) v batt (v) total batt supply standby current vs. batt supply voltage v en = 0v toc02 0.2v/div (ac - coupled) 100ma/div 0a 200ma/div 0a toc08 i neg i l4 neg load transient response (0ma to 100ma) v neg 100 s/div 6.40 6.42 6.44 6.46 6.48 6.50 6.52 6.54 6.56 6.58 6.60 0.00 0.02 0.04 0.06 0.08 0.10 v pos (v) i pos (a) pos load regulation toc03 10v/div 5v/div 0v toc9 10ms/div power - up sequence of all supply outputs (led driver not shown) v pos v gvdd v neg 5v/div v gvee 10v/div 100ma/div 0a 200ma/div 0a 200mv/div (ac - coupled) toc05 i pos i l3 pos load transient response (0ma to 100ma) v pos 100 s/div -0.020 -0.015 -0.010 -0.005 0.000 0.005 0.010 0.015 0.020 0.00 0.02 0.04 0.06 0.08 0.10 v pos +v neg (v) load current (a) v pos + v neg load regulation i gvdd = i gvee = 0a toc06 maxim integrated 8 7slfdo2shudwlqjkdudfwhulvwlfv www.maximintegrated.com MAX20070 integrated tft power supply and led backlight driver
(t a = +25c.) 70 72 74 76 78 80 82 84 86 88 90 10 30 50 70 90 efficiency (%) i diff (ma) efficiency with diff load from v pos to v neg i gvdd = i gvee = 0a toc13 10v/div 5v/div 0v toc10 20ms/div power supply sequence of all supply outputs (led driver not shown) v neg 10v/div 5v/div v gvdd v pos v gvee 0 20 40 60 80 100 120 140 160 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 i led (ma) r iset (k) i led vs. r iset toc16 15.90 15.95 16.00 16.05 16.10 0.5 1.0 1.5 2.0 2.5 3.0 v gvdd (v) i gvdd (ma) gvdd load regulation i pos = i neg = i gvee = 0a toc11 4.98 4.99 5.00 5.01 5.02 5.03 5.04 5.05 0 10 20 30 40 v cc (v) v batt (v) v cc line regulation t a = - 40oc toc17 t a = +105oc v cc at no load t a = +25oc 7.00 7.01 7.02 7.03 7.04 7.05 7.06 7.07 7.08 7.09 7.10 0.5 1.0 1.5 2.0 2.5 3.0 - v gvee (v) i gvdd (ma) gvee load regulation i pos = i neg = i gvdd = 0a toc12 4.98 4.99 5.00 5.01 5.02 5.03 5.04 5.05 0 10 20 30 40 v cc (v) i vcc (ma) v cc load regulation t a = - 40oc toc18 t a = +105oc t a = +25oc 0 5 10 15 20 25 30 0 10 20 30 40 i batt (ma) v batt (v) batt supply current vs. batt voltage toc14 v dim = 0v, v en = 3.3v t a = +25oc 1.2400 1.2425 1.2450 1.2475 1.2500 1.2525 1.2550 1.2575 1.2600 -40 -25 -10 5 20 35 50 65 80 95 v iset (v) temperature (oc) v iset vs. temperature v dim = 0v toc15 maxim integrated 9 typical operating characteristics (continued) www.maximintegrated.com MAX20070 integrated tft power supply and led backlight driver
(t a = +25c.) 5v/div 0v 20v/div 0v 100ma/div 0a toc22 200ns/div v dim v boost i out1 +i out2 led switching with dimming pulse width of 1 s dimming freq = 200hz 100ma/div 5v/div toc19 20ms/div v boost v batt startup behavior of led driver at dim = 100% v dim i out1 +i out2 5v/div 10v/div 0v 0v 0v 0ma 75 77 79 81 83 85 87 89 0 50 100 150 200 efficiency (%) led current per string (ma) efficiency vs. led current for led driver 9 leds toc25 7 leds 8 leds 100ma/div 5v/div toc20 20ms/div v out v batt startup waveform of led driver with dim pw = 25 s (dim freq = 200hz) v dim i out1 +i out2 5v/div 10v/div 0ma 0v 0v 0v 0v 0v 2v/div toc26 v pos tft fault pos shorted to ground v flt 1ms/div 100ma/div 0a 10v/div 5v/div toc21 20ms/div i out1 +i out2 v out startup waveform of led driver with dim duty = 25% (dim freq = 200hz) v batt v dim 5v/div 0v 0v 50ma/div 0v 2v/div toc27 0a/0a i out1 led fault created by shorting 3 leds in string1 v flt i out2 5v/div 0v 100ma/div 0a 20v/div toc23 0v v boost i out1 +i out2 led switching with dimming pulse width of 25 s dimmming freq = 200hz v dim 4us/div 2.3 2.4 2.5 2.6 2.7 2.8 2.9 -40 -25 -10 5 20 35 50 65 80 95 110 out_ leakage current (ua) temperature (oc) out_ leakage current vs. temperature toc24 v out1 = v out2 = 40v v dim = 0v maxim integrated 10 7slfdo2shudwlqjkdudfwhulvwlfvfrqwlqxhg www.maximintegrated.com MAX20070 integrated tft power supply and led backlight driver
pin name function 1 pos positive source-driver output voltage 2 fbp feedback input for hvinp. connect a resistor from this pin to ground to set the hvinp voltage. 3 in supply input. connect a 1f ceramic capacitor from this pin to ground for proper operation. 4 lxn dc-dc inverting converter inductor/diode connection 5 inn buck-boost converter input. connect a 1f ceramic capacitor from this pin to ground for proper operation. 6 neg negative source-driver output voltage 7 gnd ground connection 8 dgvee connects directly to v gvee charge-pump output such that during v gvee discharge, v gvee is discharged through an internal switch connected between dgvee and gnd. 9 dn regulated charge-pump driver for v gvee . connect to fying capacitor. 10 seq sequencing programming pin. connect appropriate resistor to ground to program desired sequencing. 11 fbng feedback input for v gvee 12 ref 1.25v reference output 13 lgnd power-ground connection for led driver 14 flt active-low fault-indicating output 15 iset full-scale led current-adjustment pin. the resistance from iset to gnd controls the current in each led string. 16 dim pwm dimming input 17 out1 led string 1 cathode connection. connect to ground if not used. MAX20070 tqfn top view fbp lxn inn neg gnd pos drain cs comp batt ovp out2 1 2 pgvdd 4 5 6 7 fbpg pgnd flt lgnd ref fbng in en 3 lxp seq hvinp dn + dp iset dgvdd dim dgvee out1 8 v cc 16 15 14 13 12 11 10 9 17 18 19 20 21 22 23 24 26 25 27 28 29 30 31 32 *ep = gnd maxim integrated 11 pin confguration pin description MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
pin name function 18 out2 led string 2 cathode connection. connect to ground if not used. 19 ovp led driver output-voltage-sensing input. this voltage is used for overvoltage protection. 20 comp led driver switching-converter compensation input. connect an rc network from comp to gnd for compensation. 21 cs led driver switching-mosfet source connection. connect a sense resistor from cs to pgnd to set the switching mosfet current limit. 22 en enable input 23 drain internal led driver switching-mosfet drain 24 batt led driver supply input connected to a 4.75v to 40v supply. bypass batt to ground with a ceramic capacitor. 25 v cc 5v regulator output. place a 1f ceramic capacitor as close as possible to v cc and gnd. 26 dgvdd connects directly to v gvdd charge-pump output, such that during v gvdd discharge, v gvdd is discharged through an internal switch connected between dgvdd and gnd. 27 dp regulated charge-pump driver for v gvdd . connect to fying capacitor. 28 pgvdd slowly switches out the hvinp voltage to the positive charge pump to provide soft-start control of the v gvdd output. 29 fbpg feedback input for v gvdd . connect a resistor from this pin to ground to set the v gvdd voltage. 30 pgnd power-ground connection 31 lxp boost hvinp converter internal-drain mosfet connection. connect to external inductor and boost diode anode. 32 hvinp input power for the pos voltage rail ep exposed pad. connect to a large contiguous copper-ground plane for optimal heat dissipation. do not use ep as the only electrical ground connection. maxim integrated 12 pin description (continued) MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
typcical operating circuits figure 1. simplified operating circuit for boost led driver d1 l1 battery input fault output enable input batt ep en gnd seq dn dp pgvdd in dgvee dgvdd fbpg fbng ref c1 c2 c21 r15 c13 r11 c22 dim input d13 c23 c12 c5 c6 l2 d2 v pos v neg tft power input c7 c8 c9 v gvdd v gvee c10 c19 c14 c11 c20 d3-2 d9-2 d5 d11 d6 MAX20070 d12 l3 r16 c3 c4 d3-1 d9-1 flt lgnd lgnd agnd lgnd agnd agnd agnd agnd r9 r10 r12 lgnd v cc drain pgnd comp cs ovp iset dim out1 out2 lx fbp inn hvinp pos neg lxn lgnd tft power input r17 tft power input r5 r4 r6 r7 r8 lgnd agnd maxim integrated 13 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
figure 2. simplified operating circuit for sepic led driver d1 l1 battery input fault output enable input batt ep en gnd seq dn dp pgvdd in dgvee dgvdd fbpg fbng ref c1 c2 c21 r15 c13 r11 c22 dim input d13 c23 c12 c5 c6 l2 d2 v pos v neg tft power input c7 c8 c9 v gvdd v gvee c10 c19 c14 c11 c20 d3-2 d9-2 d5 d11 d6 MAX20070 d12 l3 r16 c3 c4 d3-1 d9-1 flt lgnd agnd lgnd agnd agnd agnd agnd r9 r10 r12 lgnd v cc drain pgnd comp cs ovp iset dim out1 out2 lx fbp hvinn hvinp pos neg lxn tft power input r17 r5 r4 r6 r7 r8 lgnd agnd l4 pgvee c12 c23 lgnd typcical operating circuits (continued) maxim integrated 14 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
figure 3. simplified operating circuit for coldcrank below 4.5v d1 l1 battery input fault output enable input batt ep en gnd seq dn dp pgvdd in dgvee dgvdd fbpg fbng ref c1 c2 c21 r15 c13 r11 c22 dim input d13 c23 c12 c5 c6 l2 d2 v pos v neg tft power input c7 c8 c9 v gvdd v gvee c10 c19 c14 c11 c20 d3-2 d9-2 d5 d11 d6 MAX20070 d12 l3 r16 c3 c4 d3-1 d9-1 flt lgnd agnd lgnd agnd agnd agnd agnd r9 r10 r12 lgnd v cc drain pgnd comp cs ovp iset dim out1 out2 lx fbp hvinp pos neg lxn tft power input r17 r5 r4 r6 r7 r8 agnd 6.5v lgnd lgnd 6.5v inn tft power input typcical operating circuits (continued) maxim integrated 15 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
figure 4. functional block diagram MAX20070 led current sinks and boost control batt v cc drain lgnd comp cs ovp iset dim out1 out2 1mhz boost lx fbp positive soft-start and discharge negative soft-start and discharge hvinp pos neg 1mhz buck- boost lxn inn enable control and fault logic ep power-rail output control en gnd seq flt positive regulated charge pump dn dp pgvdd in dgvee dgvdd fbpg fbng ref 1.25v pgnd pgnd pgnd agnd agnd r r negative regulated charge pump pgnd typcical operating circuits (continued) maxim integrated 16 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
the devices typical operating circuit schematic shown in figure 5 generates 6.5v source-driver supplies at 100ma each and also generates +16v and -7v for gate-driver supplies. the current rating for the gate-driver supplies is 3ma (max) on each output. the input voltage for the tft power section is 2.7v to 5.5v. the led driver is a boost led driver that operates from a 4.75v to 18v input and can withstand a 40v load dump. the led current per string is set at 160ma and can power two strings with a 34v (max) output voltage. table 1 lists recommended critical components and table 2 lists contact information for the component suppliers. figure 5. typical operating circuit schematic d1 l1 battery input fault output enable input batt ep en gnd seq dn dp pgvdd in dgvee dgvdd fbpg fbng ref c1 c1 c21 r15 c13 r11 c22 dim input d12 c23 c12 c5 c6 l2 d17 v pos v neg tft power input c7 c8 c9 v gvdd v gvee c10 c19 c14 c11 c20 d6-2 d9-2 d10-1 d11-1 d10-2 MAX20070 d11-2 l3 r16 c3 c4 d6-1 d9-1 flt lgnd lgnd agnd lgnd agnd agnd agnd agnd r9 r10 r12 lgnd v cc drain pgnd comp cs ovp iset dim out1 out2 lx fbp inn hvinp pos neg lxn lgnd tft power input r17 tft power input r5 r4 r6 r7 r8 lgnd agnd 10f, 10v 1f 50v 4.7f 25v c2 1f 50v 1f 25v 0.1f, 50v 0.1f 50v 0.1f 50v 1f 25v 16.9k? 200k? 1f 25v 0.1f 0.1f 0.1f 50v 50v 50v 150k? 845k? 20k? c25 50v 0.22f 4.7f 25v 4.7f 4.7f 4.7f 25v 25v 25v 0? 55k? 4.7f 25v c17 4.7f 25v q1 en en 7.5k? 2.55k? 0.04? 18.7k? 242k? 33nf c29 470pf cs cs c39 220pf r21 16? 1w typical operating circuit schematic maxim integrated g 17 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
detailed description the MAX20070 is a highly integrated power supply and led backlight driver for automotive tft-lcd applications. the device integrates one buck-boost converter, one boost converter, two gate-driver supplies, and a boost/ sepic converter that power a two-string led driver. the main power-supply section, consisting of the buck- boost converter, boost converter, and gate-driver supplies, operates from an available 2.7v to 5.5v supply. the boost/ sepic converter that powers the led drivers operates from a separate 4.75v and 40v supply voltage, making the MAX20070 device ideal for automotive tft-lcd applications. both the buck-boost and boost converter and the led driver have built-in spread spectrum for reducing emi. the boost converter provides an output voltage adjustable up to 15v (max), with a 100ma (max) output current. the buck-boost converter provides a negative output voltage that tracks the positive voltage from the boost converter. there are two switching-frequency options (400khz and 1mhz) for the boost and buck-boost converter. both boost and buck-boost converters share a common clock. the buck-boost converter uses an internal p-channel mosfet as the switching element, with a 100ma (max) output current. the boost converter uses an internal n-channel switching mosfet as the switching element. with an appropriate resistor (140k? or 180k?) on the seq pin, the buck-boost converter can turn off completely. the switching frequency for the led boost/sepic converter is fxed at an internal clock frequency. there are three frequency options available: 400khz, 1mhz, and 2mhz. the led boost/sepic converter also has built-in spread spectrum for reduced emi. the led-string channel current is adjustable from 20ma to 160ma using an external resistor. the external resistor sets all the channel currents to the same value. the device facilitates connecting multiple strings in parallel to increase the current capability of the current sinks and also features pulsed dimming control with a minimum pulse width as low as 1s through a logic-control input (dim). the device provides gate-driver supplies using positive and negative charge-pump regulators, with a maximum current capability of 3ma each. output voltage is adjustable with a maximum output of +22v on the positive charge pump and -22v on the negative charge pump. the startup and shutdown sequences for all power domains, controlled by using one of the seven preset modes, is selectable through a resistor on the seq pin. the device is available in a 32-pin (5mm x 5mm) tqfn package with an exposed pad and operates over the -40c to +105c ambient temperature range. table 1. component list designation qty description c2 1 33f, 50v hybrid conductive- polymer capacitor suncon 50hvh33m d1 1 3a, 60v schottky diode (smb) diodes inc. b360b d6, d9Cd11 4 30v, 200ma dual in-series schottky diodes (sot323) central semiconductor cbat54sw d12, d17 2 30v, 0.5a schottky diodes (sod323) diodes inc. b0530ws l1 1 4.7h inductor coilcraft mss1048-472 l2, l3 2 10h inductors coilcraft lps4018-103 q1 1 60v, 115ma n-channel mosfet 2n7002 table 2. component suppliers supplier website central semiconductor www.centralsemi.com coilcraft, inc. www.coilcraft.com diodes inc. www.diodes.com murata americas www.murataamericas.com tdk corp. www.component.tdk.com sun electronic industries corp. www.sunelec.co.jp note: other capacitors are surface-mount ceramic capacitors of x7r dielectric. maxim integrated 18 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
features additional features of the MAX20070 include: 2.7v to 5.5v input for tft power 4.75v to 40v input for backlight led driver integrated 1mhz/400khz boost and buck-boost converters for tft power integrated boost/sepic converter with two x 160ma led drivers adaptive voltage optimization on led driver to reduce power dissipation in the led current sinks spread spectrum on led driver and tft for reduced emi en input to shut down all the converters and place part in low-quiescent-current standby mode positive and negative 3ma gate-voltage regulators with adjustable output voltage resistor-programmable fexible sequencing through seq pin tft power section source-driver power supplies the source-driver power supplies consist of a boost converter and an inverting buck-boost converter that generate +15v (max) and -15v (max), respectively, and can deliver up to +100ma on the positive regulator and -100ma on the negative regulator. the positive source- driver power supplys regulation voltage (v pos ) can be set by a resistor-divider on fbp, as shown in figure 6, or provide 6.5v if the fbp pin is connected to ground at power-up. the positive source driver uses constant- frequency peak-current-mode control with internal fxed- slope compensation. internal compensation stabilizes the control loop. when fbp is connected to ground, the pos regulation voltage is sensed in an internal resistor-divider from pos to ground inside the device. this determination occurs at power-up. if the resistance to ground is not zero at power-up, the device senses the fbp pin voltage and regulates this voltage to 1.25v. the negative source-driver supply voltage (v neg ) is automatically tightly regulated to -v pos within 50mv. v neg cannot be adjusted independently of v pos . the negative source driver is a buck-boost dc-dc converter that uses peak current- mode control with internal fxed-slope compensation to regulate the output voltage. there is an internal resistor- divider from pos to neg. the center point of this divider is regulated to 0v by the control loop for the negative source driver. the negative source driver can be turned off completely by setting the resistor between seq and ground to 140k? or 180k?. a simplifed block diagram of the tft boost converter is shown in figure 6 . there is an internal error amplifer with a g m = 23s that has fbp and ref = 1.25v as inputs. there is an internal compensation network at the output of the error amplifer. different values of the compensation network switch in and out depending on the connection to figure 6. tft boost converter simplified block diagram c c r c r s q q clock slope compensation in l3 lxp hvinp i lxp 0.4 x i lxp ref fbp d12 r11 r12 c33 fbp g m = 23s MAX20070 c18 maxim integrated 19 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
the fbp pin. if fbp is grounded, the circuit regulates the output voltage to 6.5v and the pos voltage is sensed by an internal resistor-divider (not shown). when fbp is not shorted to ground and is connected to the junction of the resistor-divider (r9 and r10), external feedback is used to control the pos voltage. c c = 140pf, r c = 490k? (when external feedback is used) c c = 180pf, r c = 280k? (when internal feedback is used) for the current loop, there is internal current sensing using a transresistance of r t = 0.4v/a. the v cs (i_inductor x r t ) sensing voltage is added to the slope compensation. the slope-compensation signal has a slope of 590mv per microsecond. the resulting v sum = v cs + v slope is compared to the v comp (output of the error amplifer) at the input of the pwm comparator to regulate the lxp duty cycle. control-loop operation of the tft inverter circuit a simplifed block diagram of the tft inverter circuit is shown in figure 7 . there is an internal error amplifer with a g m = 13s that has v ref = 0v and the midpoint of an internal resistor-divider (r-r), connected from pos to neg, as inputs. at the output of the error amplifer, there is an internal compensation network: c c = 140pf, r c = 360k? for the current loop, there is internal current sensing using a transresistance of r t = 0.31v/a. the v cs (i_inductor x r t ) sensing voltage is added to the slope compensation. the slope-compensation signal has a slope of 590mv per microsecond. the resulting v sum = v cs + v slope is compared to the v comp (output of the error amplifer) at the input of the pwm comparator to regulate the lxn duty cycle. gate-driver power supplies the positive gate-driver power supply (v gvdd ) generates +22v (max) and the negative gate-driver power supply (v gvee ) generates -22v (max). both supplies can supply up to 3ma current. the v gvdd and v gvee regulation voltages are both set using the external resistor networks shown in figure 2 . both charge-pump regulators use a 400khz switching frequency. the charge pumps regulate the output voltage by controlling the current that fows into the fying capacitors. operation of the positive charge pump the positive charge-pump regulator is typically used to generate the positive supply rail for the tft-lcd gate- driver ics. the output voltage is set with an external resistive voltage- divider from its output to gnd, with the midpoint connected to fbpg. the number of charge-pump stages and the setting of the feedback-divider determine the output voltage of the positive charge-pump regulator. the charge pump figure 7. tft inverter circuit simplified block diagram c c r c r s q q clock slope compensation inn i lxp 0.31 x i lxn d17 g m = 13s MAX20070 r pos r neg neg l4 lxn c25 maxim integrated 20 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
includes a high-side p-channel mosfet (p1) and a low- side n-channel mosfet (n1) to control the power transfer (see figure 8 ). the error amplifer compares the feedback signal (fbpg) with a 1.25v internal reference. if the feedback signal is below the reference, the charge-pump regulator turns on p1 and turns off n1 when the rising edge of the oscillator clock arrives, level shifting c3 and c4 by v pgvdd volts. if the voltage across c9 plus a diode drop (v dgvdd + v diode ) is smaller than the level-shifted fying- capacitor voltage (v c4 + v pgvdd ), charge fows from c4 to c9 until diode d9-1 turns off. similarly, if the voltage at the d3-1 cathode plus a diode drop (v pgvdd -v c8 +v diode ) is smaller than the level-shifted fying-capacitor voltage (v c3 + v pgvdd ), charge fows from c3 to c8 until diode d3-1 turns off. the falling edge of the oscillator clock turns off p1 and turns on n1, allowing v pgvdd to charge up the fying capacitor c3 through d3-2 and c8 to charge c4 through diode d9-2. if the feedback signal is above the reference when the rising edge of the oscillator arrives, the regulator ignores this clock edge and keeps n1 on and p1 off. the charge-pump regulator also includes a discharge switch from dgvdd to ground, turned off to discharge the output capacitors during the sequential turn-off of the output voltage, as programmed by the resistor on the seq pin (r seq ). the node pgvdd is internally connected through a switch to the hvinp voltage. see table 3 for the sequencing options. operation of the negative charge pump the negative charge-pump regulator is typically used to generate the negative supply rail for the tft-lcd gate- driver ics. the output voltage is set with an external resistive voltage-divider from its output to ref, with the midpoint connected to fbng. the number of charge-pump stages and the setting of the feedback-divider determine the output of the negative charge-pump regulator. the charge-pump controller includes a high-side p-channel mosfet (p2) and a low-side n-channel mosfet (n2) to control the power transfer (see figure 9). the error amplifer compares the feedback signal (fbng) with a 0v internal reference. if the feedback signal is above the reference, the charge-pump regulator turns n2 on and p2 off when the rising edge of the oscillator clock arrives, level shifting c10 and c19.the falling edge of the oscillator clock turns n2 off and p2 on, allowing hvinp to charge up fying-capacitor c10 and c19. if the feedback signal is figure 8. positive charge-pump block diagram MAX20070 d9-1 d9-2 d3-1 d3-2 c4 c3 c7 c9 c8 fbpg dp pgvdd dgvdd error amplifier ref 1.25v p1 positive charge-pump regulator r4 r5 discharge n1 hvinp cp_on oscillator maxim integrated 21 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
below the reference voltage of 0v when the rising edge of the oscillator arrives, the regulator ignores this clock edge and keeps p2 on and n2 off. in the figure 9 diagram, the negative charge pump uses a doubler confguration; however, in cases where the absolute value of the negative charge-pump voltage is low enough, eliminate diodes d11 and d12. in that case, c19 is also open and c20 is eliminated, with the cathode of d6 connected to ground. for sequencing of the output voltages at turn-off, a discharge switch is connected from dgvee to ground. the desired sequence is programmable by a resistor on the seq pin. see table 3 for the sequencing options. figure 9. positive charge-pump block diagram figure 10. sequencing diagram MAX20070 d5 d6 d11 d12 c10 c19 c11 c20 fbng dn dgvee error amplifier 0v p2 negative charge-pump regulator r6 r7 discharge hvinp oscillator n2 ref en pok hvinp neg gvee pos gvdd t1 t2 t3 t4 t5 t6 t7 t8 512ms maxim integrated 22 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
fault protection on the tft section the device has robust fault and overload protection. if any of the source-driver or gate-driver supplies fall below 80% (typ) of the programmed regulation voltage for more than 50ms (typ), all the outputs latch off and a fault condition is set. if a short condition occurs on any of the source- driver supplies for more than 10s, all the outputs latch off and a fault condition is set. a short condition is detected when the output voltage falls below 40% of the intended regulation voltage. the output with the fault turns off immediately, while the other outputs follow the turn-off sequence programmed by the resistor on the seq pin. the led driver section is not turned off during a tft fault event. the fault condition is cleared when the en pin or in supply is cycled. in the case of a thermal fault, both the tft power section and the led drivers turn off immediately and remain latched off. en pin cycling or input power cycling is required to unlatch the fault and restart switching. true shutdown the device completely disconnects the loads from the input (in) when in shutdown mode. in most boost converters, the external rectifying diode and inductor form a dc current path from the battery to the output. if a load is connected to the boost-converter output, it can drain the battery even in shutdown. the device has an internal switch at pos. when this switch turns off during shutdown, there is no dc path from the input to pos. output control the devices source-driver and gate-driver outputs (v gvee , neg, pos, and v gvdd ) can be controlled by the resistor value connected from seq to ground. all outputs are brought up with soft-start control to limit the inrush current. table 3 lists the sequencing options that are programmable with a resistor on the seq pin. table 3. power sequencing seq pin resistor (r seq ) (k?) power-on supply sequencing (t1Ct4 is the time from the expiration of hvinp soft-start period) power-off supply sequencing (reverse order of power-up) (t5Ct8 is the time from when en is driven low) 1st after t1ms 2nd after t2ms 3rd after t3ms 4th after t4ms 1st after t5ms 2nd after t6ms 3rd after t7ms 4th after t8ms 20 1% pos neg v gvee v gvdd v gvdd v gvee neg pos 60 1% pos neg v gvdd v gvee v gvee v gvdd neg pos 100 1% neg pos v gvee v gvdd v gvdd v gvee pos neg 140 1% pos v gvee v gvdd no neg output v gvdd v gvee pos no neg output 180 1% pos v gvdd v gvee no neg output v gvee v gvdd pos no neg output 220 1% pos neg v gvdd , v gvee v gvdd , v gvee pos, neg 260 1% v gvee v gvdd neg pos pos neg v gvdd v gvee note: t1 = t5 = 15ms t2 = t6 = 30ms t3 = t7 = 45ms t4 = t8 = 60ms maxim integrated 23 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
power-up/power-down sequencing and timing the device allows for fexible power-up/power-down sequencing and timing of the source-driver and gate- driver power supplies (v gvee , neg, pos, and v gvdd ). toggling the en pin from low to high initiates an adjustable preset power-up sequence. toggling the en pin from high to low initiates an adjustable preset power-down sequence. the en pin has an internal deglitching flter of 7s (typ). figure 11 shows a waveform of the internal en signal, along with the en input. note: a glitch in the en signal with a period less than 7s is ignored by the internal enable circuitry. led driver section the MAX20070 also includes a high-effciency hb led driver, which integrates all the features necessary to implement a high-performance backlight driver to power leds in small-to-medium-sized displays for automotive as well as general applications. the device provides load-dump voltage protection up to 40v in automotive applications and incorporates a dc-dc controller with peak-current-mode control to implement a boost or sepic-type switched-mode power supply and a 2-channel led driver with 20ma to 160ma constant-current-sink capability per channel. the boost/sepic controller features constant-frequency peak-current-mode control with internal slope compensation to control the duty cycle of the pwm controller. the dc-dc converter generates the required supply voltage for the led strings from a wide battery input supply range. connect led strings from the dc-dc converter output to the 2-channel constant-current sinks that control the current through the led strings. a single resistor connected from iset to ground sets the forward current through both led strings. the device features adaptive led voltage control that adjusts the converter output voltage depending on the forward voltage of the led strings. this feature minimizes the voltage drops across the constant-current sinks and reduces power dissipation in the device. the device provides a very wide pwm dimming range where a dimming pulse as narrow as 1s is possible at a 200hz dimming frequency. the device includes output overvoltage protection that limits the converter output voltage to the programmed overvoltage threshold in the event of an open-led condition, and also features an overtemperature protection that shuts down the controller if the die temperature exceeds +165c. in addition, the device has a shorted- led string detection and an open-drain flt signal to indicate open-led, shorted-led, and overtemperature conditions. current-mode dc-dc controller the MAX20070 uses current-mode control to provide the required supply voltage for the led strings. the internal mosfet is turned on at the beginning of every switching cycle. the inductor current ramps up linearly until it is turned off at the peak current level set by the feedback loop. the peak inductor current is sensed from the voltage across the current-sense resistor (see r11 in figure 1 ), connected from the source of the internal mosfet to pgnd. a pwm comparator compares the current-sense voltage plus the internal slope-compensation signal with the output of the transconductance error amplifer. the controller turns off the internal mosfet when the voltage at cs exceeds the error amplifers output voltage. this process repeats every switching cycle to achieve peak current-mode control. error amplifer the internal error amplifer compares an internal feedback (fb) signal with an internal reference voltage (v ref ) and regulates its output to adjust the inductor current. an internal minimum string detector measures the minimum led string cathode voltage with respect to gnd. during normal operation, this minimum v out_ voltage is regulated to 0.75v through feedback. the resulting dc- dc converter output voltage is 0.75v above the maximum required total led voltage. figure 11. power-up/power-down sequencing and timing waveform en input high low less than 7s low high en input less than 7s internal en internal en low high maxim integrated 24 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
the converter stops switching when led strings turn off during pwm dimming. the error amplifer disconnects from the comp output to retain the compensation capacitor charge. this allows the converter to settle to a steady-state level immediately when the led strings turn on again. this unique feature provides fast dimming response without having to use large output capacitors. if the pwm dimming on-pulse is less than 25s, the feedback controls the voltage on ovp, such that the converter output voltage regulates at 95% of the ovp threshold. this mode ensures that narrow pwm dimming pulses are not affected by the response time of the converter. during this mode, the error amplifer remains connected to the comp output. adaptive-led voltage control the device reduces power dissipation using an adaptive- led voltage-control scheme. the adaptive-led voltage control regulates the dc-dc converter output based on the operating voltage of the led strings. the voltage at each of the current-sink outputs (out1, out2) is the difference between the dc-dc regulator output voltage (v led ) and the total forward voltage of the led string connected to the output (out_). the dc-dc converter then adjusts v led until the output channel with the lowest voltage at out_ is 0.75v relative to gnd. as a result, the device minimizes power dissipation in the current sinks and still maintains led current regulation. for effcient adaptive-control functionality, use an equal number of hb leds of the same forward-voltage rating in each string. led current control (iset) the device features two identical constant-current sinks used to drive multiple hb led strings. the current through each of the channels is adjustable between 20ma and 160ma using an external resistor (r iset ) connected between iset and gnd. for single-channel operation, connect channel 1 (out1) and channel 2 (out2) together. when the out_ pins are connected, the current in the leds will be twice the current programmed by the iset pin. if only single-string operation is needed, the out_ pin for the unused channel should be connected to ground. this disables the string at power-up. current limit the device includes a fast current-limit comparator to terminate the on-cycle during an overload or a fault condition. the current-sense resistor (r cs ) connected between the source of the internal mosfet and ground sets the current limit. the cs input has a 0.27v (typ) voltage trip level (v cs ). use the following equation to calculate r cs : r cs = (v cs )/i peak where i peak is the peak current that fows through the mosfet. the bond-wire resistance to the cs pin is 13m? (typ) and the actual value of r cs should take into account the bond-wire resistance. undervoltage lockout the device features two undervoltage lockouts (uvlobatt and uvlovc). the undervoltage-lockout threshold for v batt is 4.2v (typ) and the undervoltage- lockout threshold for v cc is 4v (typ). when v cc is below its uvlo, the led driver completely turns off, including the dimming and switching of the dc-dc converter. if there is a v cc short and the voltage is below the uvlo, the led driver turns off, but the tft power section keeps working unless a thermal shutdown is triggered. led driver soft-start the devices boost/sepic converter features a soft-start that is activated during power-up. the soft-start ramps up the output of the converter in 64 steps in a period of 100ms (typ), unless both strings reach current regulation point, in which case the soft-start would terminate to resume normal operation immediately. once the soft-start ends, the internal soft-start circuitry is disabled and normal operation begins. the 100ms soft-start period begins when the led driver section is enabled. led dimming control the device features led brightness control using an external pwm signal applied to dim. a logic-high signal on the dim input enables all two led current sources and a logic-low signal disables them. the duty cycle of the pwm signal applied to dim also controls the dc-dc converter's output voltage. if the pulse-width duration of the pwm signal is less than 25s (dim pulse width increasing), the boost converter regulates its output based on feedback from the ovp input. while in this mode, the converter output voltage regulates to 95% of the overvoltage threshold at the ovp pin. if the pulse-width duration of the pwm signal is greater than or equal to 25s (dim pulse width increasing), the converter regulates its output so that the minimum voltage at out_ is 0.75v. at power-up, if the device has completed the soft-start period of 100ms (typ) and the pwm signal at the dim pin is still low, the maxim integrated 25 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
device regulates the output voltage based on the feedback signal coming from the ovp pin. once a pwm pulse width greater than 25s is applied, the converter regulates its output so that the minimum voltage at the out_ pin is 0.75v. when dimming pulse width is less than 25s, the converter regulates the voltage on the ovp pin to 95% of the ovp voltage. this is referred to as lodim mode. if at any time after power-up the dim input goes low for more than 40ms, the converter will regulate the output at the ovp pin to 95% of ovp voltage. to bring the converter out of this mode, the dimming-signal pulse width needs to be greater than 25s. open-led management and overvoltage protection on power-up, the device detects and disconnects any unused current-sink channels before entering the dc- dc converter soft-start. disable the unused current-sink channels by connecting the corresponding out_ to led ground (referred to as ledgnd). this avoids asserting the flt output for the unused channels. after soft-start, the device detects open led and disconnects any strings with an open led from the internal minimum out_ voltage detector. this keeps the dc-dc converter output voltage within safe limits and maintains high effciency. during normal operation, the dc-dc converter output-regulation loop uses the minimum out_ voltage as the feedback input. if any led string is open, the voltage at the opened out_ goes to v ledgnd . the dc-dc converter output voltage then increases to the overvoltage-protection threshold set by the voltage-divider network connected between the converter output, ovp input, and gnd. the overvoltage-protection threshold at the dc-dc converter output (v ovp ) is determined using the following formula: v ovp = 1.25 x (1 + r17/r16) where 1.25v (typ) is the ovp threshold. select r16 and r17 such that the voltage at out_ does not exceed the absolute maximum rating. as soon as the dc-dc converter output reaches the overvoltage-protection threshold, the pwm controller switches off. any current-sink output with v out_ < 300mv (typ) is disconnected from the minimum voltage detector. connect the out_ of all channels without led connections to gnd before power-up to avoid ovp triggering at startup. when an open-led overvoltage condition occurs, flt is asserted. open-led detection is disabled when the pwm dimming pulse width is less than 25s. if an open-led fault is detected when the dimming pulse width is greater than 25s and the dimming pulse is below 25s, the fault fag remains asserted. to remove the fault assertion, en or batt must be cycled. short-led detection t he device features two-level short-led detection circuitry. a level 1 short is detected if the difference between the total forward led voltages of the two strings exceeds 4.2v (typ). if a level 1 short is detected on either of the strings, flt is asserted. the strings continue to operate normally when a level 1 fault is detected. a level 2 short is detected if the difference between the total forward led voltages of the two strings exceeds +7.8v (typ). if a level 2 short is detected on either of the strings, the particular led string with the short is turned off after 6s and flt is asserted. the strings are reevaluated on each dim rising edge and flt is deasserted if the short is removed. the short-led detection is disabled when the dimming pulse width is less than 25s. however, if a short-led fault asserts when the dimming pulse width is above 25s and then reduced to below 25s, the fault fag stays asserted even if the fault is removed. to deassert the fault, the dimming pulse width has to be higher than 25s and the short fault removed. during load-dump conditions, the minimum string voltage goes above 0.75v and the converter stops switching. under these conditions, if an led-short fault occurs and the minimum string voltage is above 1.5v, the fault signal does not assert. once the input voltage is lowered and the minimum string voltage goes below 1.5v, the fault asserts. once a fault asserts and the input voltage increases such that the minimum string voltage goes above 1.5v, the fault remains asserted. the fault deasserts only if the minimum string voltage goes below 1.5v and the led-short fault is removed. applications information tft power section setting the pos voltage the positive output voltage is set by connecting fbp to a resistive voltage-divider between the output and gnd (see figure 2 ). select feedback resistor r10 in the 30k to 100k range. r9 is then given by: pos fbp v r9 r10 1 v ?? = ? ?? ?? where v fbp = 1.25v. maxim integrated 26 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
setting the gate-driver voltages the positive gate-driver voltage is set by connecting fbpg to a resistive voltage-divider between the output and gnd (figure 1). select foldback resistor r5 in the 10k to 20k range. r4 is then given by: gvdd fbpg v r4 r5 1 v ?? = ? ?? ?? where v fbpg = 1.25v. the negative gate-driver voltage is set by connecting fbng to a resistive voltage-divider between the output and ref (figure 1). select foldback resistor r7 in the 100k to 200k range. r6 is then given by: gvee ref v r6 r7 v ? ?? = ?? ?? where v fbng = 1.25v. the voltage at fbng is regulated to 0v by the MAX20070 ic. inductor selection the high switching frequencies in the device allow the use of small inductors. for most applications, 4.7h and 10h inductors are recommended. larger inductances reduce the peak inductor current, but result in skipping pulses at light loads. smaller inductances require less board space, but can cause greater peak current due to current- sense comparator propagation delay. use inductors with ferrite core or equivalent. powder iron cores are not recommended for use with high switching frequencies. the inductors saturation rating must exceed the peak current- limit setting of 1.2a. for highest effciency, use inductors with a low dc resistance (under 200m); however, for smallest circuit size, higher resistance is acceptable. diode selection high switching frequency demands a high-speed rectifer. schottky diodes, such as cmhsh5-2l, mbr0520l, or mbr0530l are recommended. for the buck converter, make sure that the diodes peak current rating exceeds the current limit and its breakdown voltage exceeds the output voltage; for the buck-boost converter, make sure that the diodes peak current rating exceeds the current limit and its breakdown voltage rating exceeds the sum of the absolute maximum output voltage and maximum input voltage. ultra-high-speed silicon rectifers are also acceptable, but schottky diodes provide better effciencies. output filter capacitor selection the primary criterion for selecting the output flter capacitor is low effective series resistance (esr). the product of the peak inductor current and the output flter capacitors esr determine the amplitude of the high-frequency ripple seen on the output voltage. for stability, the positive output flter capacitor (c23 + c12) should satisfy the following: (c23 + c12) > 10f x v pos /15v x i load /100ma most of the capacitance (2/3 of total) should be on the hvinp node and 1/3 at pos. for stability, the inverter output capacitor (c5 + c6) should also satisfy the following: (c5 + c6) > 10f x |v neg |/15v x i load /100ma input bypass capacitor selection although the output current of most MAX20070 applications may be relatively small, the input must be designed to withstand current transients equal to the inductor current limit. the input bypass capacitors reduce the peak currents drawn from the voltage source and reduce noise caused by the switching action. the input source impedance determines the size of the capacitor required at the input. as with the output flter capacitor, a low-esr capacitor is recommended. a 4.7f low-esr capacitor is adequate for most applications, although a smaller bypass capacitor may also be acceptable with low-impedance sources, or if the source supply is already well fltered. dc-dc converter for the led driver three different converter topologies are possible with the dc-dc controller in the MAX20070, which has the ground-referenced outputs necessary to use the constant- current sink drivers. if the led string forward voltage is always more than the input-supply voltage range, use the boost-converter topology. if the led string forward voltage falls within the supply voltage range, use the buck-boost- converter topology. implement a buck-boost topology using either a conventional sepic confguration or a coupled- inductor buck-boost confguration. the latter is a fyback converter with 1:1-turns ratio. 1:1-coupled inductors are available with tight coupling suitable for this application. the boost-converter topology provides the highest effciency among the above-mentioned topologies. the coupled-inductor topology has the advantage of not using a coupling capacitor over the sepic confguration. also, the feedback-loop compensation for sepic becomes complex if the coupling capacitor is not large enough. maxim integrated 27 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
led current setting select the resistor on the iset pin based on the required led current per string: r iset = 1500/i string where r iset is in k and i string is the current per string in ma. ovp resistor settings determine the maximum output voltage based on the forward-voltage drop of the leds. the maximum output voltage is given by v led : v led = v fmax x n string + 0.75v where v fmax is the maximum forward voltage on each led at the required led current (i string ) and n string is the number of leds in each string. when the dimming pulse width goes below 25s, the boost voltage should regulate to: v boost = (v led + 2) volts under this condition, the device regulates the boost voltage to 95% of ovp setting. therefore the overvoltage setting is given by: v boost = (v led + 2)/0.95 in most automotive applications, the highest value of a single resistor cannot exceed 100k?. based on this, the r17 resistor in figure 1 is 100k?. the r16 resistor is given by: r16 = 1.25 x 100/(v boost - 1.25) k? select a value of r16 that is lower than the calculated value. power-circuit design first, select a converter topology based on the input voltage range and the desired output voltage. determine the required input-supply voltage range, the maximum voltage needed to drive the led strings, including the 0.75v (min) across the constant led current sink (v led ), and the total output current needed to drive the led strings (i led ) as follows: i led = i string x n string where i string is the led current per string in amperes and n string is the number of strings used. calculate the maximum duty cycle (d max ) using the following equations. for boost confguration: led d1 in_min max led d1 ds (v v v ) d (v v v 0.27v) +? = +? ? for sepic confguration: led d1 max in_min ds led d1 (v v ) d (v v 0.27v v v ) + = ?? + + where: v d1 is the forward drop of the rectifer diode in volts (approximately +0.6v). v in_min is the minimum input supply voltage in volts. v ds is the drain-to-source voltage of the external mosfet in volts when it is on. and: 0.27v is the peak current-sense voltage. initially, use an approximate value of +0.2v for v ds to calculate d max . boost confguration the average inductor current varies with the line voltage, and the maximum average current occurs at the lowest line voltage. for the boost converter, the average inductor current is equal to the input current. select the maximum peak-to-peak ripple on the inductor current (il). the recommended peak-to-peak ripple is 60% of the average inductor current. use the following equations to calculate the maximum average inductor current (il avg ) and peak inductor current (il p ) in amperes: led avg max i il 1d = ? allowing the peak-to-peak inductor ripple il to be 30% of the average inductor current: il = il avg x 0.3 x 2 and: p avg il il il 2 ? = + maxim integrated 28 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
calculate the minimum inductance value (l min ) in henries with the inductor current ripple set to the maximum value: ( ) ?? = ? in_min ds max min sw v v 0.3v d l f il where 0.3v is the peak current-sense voltage. choose an inductor with a minimum inductance greater than the calculated l min and current rating greater than il p . the recommended saturation current limit of the selected inductor is 10% higher than the inductor peak current for boost confguration. it is necessary to verify that the chosen inductor allows operation at the minimum required dimming pulse width and at the minimum input voltage. when the dimming pulse width needed is below 25s, it is necessary to verify proper operation at a pulse width of 25s. the maximum possible duty cycle is 90%. the minimum required inductance for proper operation during a dimming pulse width of 25s is given by the following equation: ( ) ( ) ? ? = ? = in_min led in_min dim led in_min led dim led in h for the boost configura v 0.9 (v v ) 0.1 25 l i 20 v 0.9 (v 0.1 25 l i2 tion in h for the sepic configura 0 tion the selected inductor value should be the lower of l min and l dim . sepic confguration power-circuit design for the sepic confguration is very similar to a conventional design with the output voltage referenced to the input-supply voltage. for sepic, the output is referenced to ground and the inductor is split into two parts (see figure 3 for the sepic confguration). one of the inductors (l4) takes led current as the average current and the other (l1) takes input current as the average current. use the following equations to calculate the average inductor currents (il1 avg , il4 avg ) and peak inductor currents (il1 p , il4 p ) in amperes: led max avg max i d 1.1 il1 1d = ? the factor 1.1 provides a 10% margin to account for the converter losses: il4 avg = i led assuming the peak-to-peak inductor ripple il is 30% of the average inductor current: il1 = il1 avg x 0.3 x 2 and: p avg il1 il1 il1 2 ? = + il4 = il4 avg x 0.3 x 2 and: p avg il2 il4 il4 2 ? = + calculate the minimum inductance values (l1 min and l4 min ) in henries with the inductor current ripples set to the maximum value as follows: ?? = ? ?? = ? ds max min sw ds max m in_ in sw min in_min ( v 0.3v) d l1 f il1 ( v 0.3v) d l f v 4 v il4 where 0.3v is the peak current-sense voltage. choose inductors that have a minimum inductance greater than the calculated l1 min and l4 min and current rating greater than il1 p and il4 p , respectively. the recommended saturation current limit of the selected inductor is 10% higher than the inductor peak current. for simplifying further calculations, consider l1 and l2 as a single inductor with l1 and l2 connected in parallel. the combined inductance value and current is calculated as follows: min min min min min l1 l2 l l1 l2 = + and: il avg = il1 avg + il2 avg where il avg represents the total average current through both the inductors connected together for sepic confguration. use these values in the calculations for sepic confguration in the following sections. maxim integrated 29 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
select coupling-capacitor c23 so the peak-to-peak ripple on it is less than 2% of the minimum input-supply voltage. this ensures that the second-order effects created by the series-resonant circuit comprising l1, c23, and l2 do not affect the normal operation of the converter. use the following equation to calculate the minimum value of c23: led max in_min sw id c23 v 0.02 f where c23 is the minimum value of the coupling capacitor in farads, i led is the led current in amperes, and the factor 0.02 accounts for 2% ripple. current-sense resistor and slope compensation the current-sense resistor (r cs ) should be selected such that at the lowest input-line voltage, the peak voltage on the internal mosfet current-sense resistor is 0.9 x 0.25v. the bond-wire resistance of the cs pin should also be taken into account in the calculations. the typical bond- wire resistance is 15m?. the actual value of r cs used should have a resistance 15m? lower than the calculated value. once the current-sense resistor is selected, verify that the built-in internal slope compensation is adequate. if the actual desired slope-compensation ramp is greater than the internal slope, adjust the value of the current- sense resistor and the inductor such that the desired ramp is lower than the built-in internal ramp. the chosen value of r cs should satisfy the following criteria: ( ) ( ) ? > ? > led in_min cs min sw led in_min cs min sw for the boost configuration for v 2v )r 2 0.23 l 3f v v )r 2 0.23 the sepic configura l 3f tion under certain conditions, the peak current limit may limit the led current from reaching regulation when the dimming pulse width is close to 25s. lower the current- sense resistor (r cs ) such that the led current is in regulation. it may be necessary to change the size of the inductor to prevent inductor saturation after deciding the actual value of the current-sense resistor. the value of the inductance should stay as calculated earlier. output capacitor selection for all three converter topologies, the output capacitor supplies the load current when the main switch is on. the function of the output capacitor is to reduce the converter output ripple to acceptable levels. the entire output-voltage ripple appears across constant-current sink outputs because the led string voltages are stable due to the constant current. for the MAX20070, limit the peak-to-peak output-voltage ripple to 200mv to get stable output current. the esr, esl, and the bulk capacitance of the output capacitor contribute to the output ripple. in most of the applications, using low-esr ceramic capacitors can dramatically reduce the output esr and esl effects. to reduce the esl and esr effects, connect multiple ceramic capacitors in parallel to achieve the required bulk capacitance. to minimize audible noise during pwm dimming, the amount of ceramic capacitors on the output is usually minimized. in this case, an additional electrolytic or tantalum capacitor provides most of the bulk capacitance. assuming an output-ripple voltage of 100mv when operating at a dimming duty cycle of 100%, the desired output capacitance is given by the following: led max outripple sw id c f 0.1 = the minimum output capacitance for proper operation during dimming down to very narrow duty cycles is given by the following: outmin pwm 1.25 c r16 f 0.25 = where r16 is the bottom resistor in the ovp divider of figure 1 and f pwm is the dimming frequency. the actual capacitance used should be higher than both c outmin and c outripple . rectifer diode selection using a schottky rectifer diode produces less forward drop and puts the least amount of burden on the mosfet during reverse recovery. a diode with considerable reverse-recovery time increases the mosfet switching loss. select a schottky diode with a voltage rating 20% higher than the maximum boost-converter output voltage and current rating greater than that calculated in the following equation: i d = i led x 1.2 maxim integrated 30 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
feedback compensation during normal operation, the feedback control loop regulates the minimum out_ voltage to 0.75v when led string currents are enabled during pwm dimming. when led currents are off during pwm dimming, the control loop turns off the converter and stores the steady-state condition in the form of capacitor voltages, mainly the output flter-capacitor voltage and compensation-capacitor voltage. when the pwm dimming pulses are less than 24 switching clock cycles, the feedback loop regulates the converter output voltage to 95% of the ovp threshold. the worst-case condition for the feedback loop is when the led driver is in normal mode, regulating the minimum out_ voltage to 0.75v. the switching converter small- signal transfer function has a right-half plane (rhp) zero for boost confguration if the inductor current is in continuous-conduction mode. the rhp zero adds a 20db/decade gain together with a 90 phase lag, which is diffcult to compensate. the worst-case rhp zero frequency (f zrhp ) is calculated in the following equations. for boost confguration: 2 led max zrhp led v (1 d ) f 2 li ? = for sepic confguration: 2 led max zrhp led max v (1 d ) f 2 li d ? = where f zrhp is in hertz, v led is in volts, l is the inductance value of l1 in henries, and i led is in amperes. a simple way to avoid this zero is to roll off the loop gain to 0db at a frequency less than 1/5 of the rhp zero frequency with a -20db/decade slope. the switching converter small-signal transfer function also has an output pole. the effective output impedance, together with the output flter capacitance, determines the output pole frequency (f p1 ) that is calculated in the following equations. for boost confguration: led p1 led out i f 2 lv c = for sepic confguration: led max p1 led out id f 2 lv c = where f p1 is in hertz, v led is in volts, i led is in amperes, and c out is in farads. compensation components (r comp and c comp ) perform two functions: c comp introduces a low-frequency pole that presents a -20db/ decade slope to the loop gain. r comp fattens the gain of the error amplifer for frequencies above the zero formed by r comp and c comp . for compensation, this zero is placed at the output pole frequency (f p1 ), so it provides a -20db/decade slope for frequencies above f p1 to the combined modulator and compensator response. the value of r comp needed to fx the total loop gain at f p1 so the total loop gain crosses 0db with -20db/ decade slope at 1/5 the rhp zero frequency, is calculated in the following equations. for boost confguration: zrhp cs led comp p1 comp led max f ri r 5 f gm v (1 d ) = ? for the sepic confguration: zrhp cs led max comp p1 comp led max f ri d r 5 f gm v (1 d ) = ? where r comp is the compensation resistor in ohms, f zrhp and f p2 are in hertz, r cs is the switch current-sense resistor in ohms, and gm comp is the transconductance of the error amplifer (600s). the value of r comp is calculated as follows: comp comp z1 1 c 2r f = where f z1 is the compensation zero placed at 1/5 of the crossover frequency, which is, in turn, set at 1/5 of the f zrhp . if the output capacitors do not have low esr, the esr zero frequency may fall within the 0db crossover frequency. an additional pole may be required to cancel out this pole placed at the same frequency. this is usually implemented by connecting a capacitor in parallel with c comp and r comp . maxim integrated 31 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
pcb layout and guidelines careful pcb layout is important for proper operation. use the following guidelines for good pcb layout: minimize the inner-loop area created by the boost converter high switching-current connections. place d13 and c23 close to the device so the traces connecting the lx pin to the anode of d13, the cathode of d13 to c23, and c23 to the pgnd pin are all kept as short as possible to minimize the loop area contained within these connections. make these connections with short, wide traces. minimize the inner-loop area created by the buck- boost converter high switching-current connections. place c6, c1, and d2 close to the device so the traces connecting c1 to the inn pin, the lxn pin to the cathode of d2, the anode of d2 to c6, and c1 ground connection to c6 are all kept as short as possible to minimize the loop area contained within these connections. make these connections with short, wide traces. minimize the inner-loop area created by the boost- converter led driver ( figure 2) high switching-cur - rent connections. place d1 and c21 close to the device so the traces connecting the drain pin to the anode of d1, the cathode of d1 to c21, and c13 to the pgnd pin are all kept as short as possible to minimize the loop area contained within these connections. make these connections with short, wide traces. avoid using vias in the high-current paths. if vias are unavoidable, use many vias in parallel to reduce resistance and inductance. create a power-ground island (pgnd) consisting of the pgnd pin, the input and output-capacitor ground connections, the charge-pump capacitor ground connections, and the buck-boost inductor ground connection. connect all these together with short, wide traces or a small ground plane. maximizing the width of the power-ground traces improves effciency and reduces output-voltage ripple and noise spikes. create an analog ground plane (gnd) consisting of the gnd pin, all the feedback-divider ground con - nections, the in, v cc , and ref bypass capacitor ground connections, and the devices ex - posed backside pad. connect the gnd and pgnd islands by connecting the pgnd pin directly to the exposed backside pad. make no other connections between these separate ground planes. place the feedback voltage-divider resistors as close as possible to their respective feedback pins. keep the traces connecting the feedback resistors as short as possible to their respective feedback pins. placing the resistors farther away causes the feedback trace to become an antenna that may pick up switching noise. do not run any feedback trace near the lxp, lxn, drain, dp, or dn switching nodes. place the in, v cc , batt, and ref bypass capacitors as close as possible to the device. the ground connections of the in, v cc , batt, and ref bypass capacitors should be connected directly to the analog ground plane or directly to the gnd pin with a wide trace. minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. keep sensitive signals away from the lxp, lxn, drain, dp, and dn switching nodes. if necessary, use dc traces as a shield. maxim integrated 32 MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
package information for the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffx character, but the drawing pertains to the package regardless of rohs status. ordering information /v denotes an automotive qualified part. +denotes a lead(pb)-free/rohs-compliant package. *ep = exposed pad. part temp range pin-package MAX20070gtj/v+ -40c to +105c 32 tqfn-ep* package type package code outline no. land pattern no. 32 tqfn t3255+4 21-0140 90-0012 maxim integrated 33 chip information process: cmos MAX20070 integrated tft power supply and led backlight driver www.maximintegrated.com
revision history revision number revision date description pages changed 0 9/14 initial release ? 2014 maxim integrated products, inc. 34 maxim integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim integrated product. no circuit patent licenses are implied. maxim integrated reserves the right to change the circuitry and specifcations without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated and the maxim integrated logo are trademarks of maxim integrated products, inc. MAX20070 integrated tft power supply and led backlight driver for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim integrateds website at www.maximintegrated.com.


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